We want to offer all our customers the best value service for their project. To achieve this we have adopted several additional engagement models. These allow customers to introduce non-core requirements into the chip development process, saving them time and resource.
SYSTEM INTEGRATION
We design many ASICs to replace existing discreet solutions. We consequently offer PCB review and implementation to ensure that new ASICs fit into current systems with minimum risk. We can also offer PCB design services for bring up and verification work
APPLICATION FOR FUNDING
Sourcing funding for novel technologies can be challenging. We help customers and partners secure financial backing where there is industry demand and an opportunity to create jobs or a market leadership position for the UK. We work with applicants to review requirements and, in conjunction with carefully selected partners, produce finished funding applications for chip development.
IP BLOCKS
Having silicon proven IP across various fab processes allows us to improve client efficiency, reduce their risk, and shorten time to market for their product. We have wide experience of developing blocks of IP and where possible we will reuse it; in certain circumstances offering customers the opportunity to use our IP blocks in their own designs.
FPGA development and Re-target
Projects often require prototyping. As part of our service we can create a design in FPGA or take an existing design, prove it in the FPGA domain before transferring it to a full ASIC design. This concept has been further developed so that we can accelerate bring up and verification by using FPGAs through the development of test SW and HW.
Requirements management
As part of our continuous improvement programme and in conjunctin with IBM DOORS, we have developed a sytem to capture specification requirements and create a database structure that links the basic requirements to architecture and verification requirements. This allows us to improve efficiency and provide detailed traceability form chip design all the way through to silicon bring up and verification